1. Field of the Invention
The present invention relates to semiconductor memories, and particularly to the architecture and organization of the bit lines within a memory array.
2. Description of Related Art
Bit line crossover structures arc frequently used in both static and dynamic memory arrays to achieve lower worst case coupling, during both read or write operations, onto a particular bit line pair from neighboring bit lines on either side. FIG. 35, labeled prior art, is a layout diagram of a well-known bit line crossover arrangement for reducing noise coupling from adjacent bit lines. A first complementary bit line pair B0, B0B is shown incorporating a lateral crossover at both the 1/4 and 3/4 points along its length (which length, for the embodiments described herein, corresponds to the height of an array block). An adjacent complementary bit line pair B1, B1B incorporates a single crossover at the point half-way down its length. This pattern repeats every two pairs of bit lines, thus the third bit line pair B2, B2B and fourth bit line pair B3, B3B are configured respectively like B0, B0B and B1, B1B. Because photolithographic guard cells are frequently used at the edges of each arrayed group of memory cells, there is an increased layout area penalty in providing crossover structures due to the required guard cells on either side of each crossover structure. Eight such groups of guard cells, each labeled 800, are shown which are required with this arrangement at the top and bottom edges of each arrayed group of memory cells. As indicated in FIG. 35, each guard cell group 800 may be implemented as two additional non-functional (i.e., dummy) word lines. Consequently the area consumed by such guard cell groups is non-trivial, and thus the total area required to implement the crossover arrangement of FIG. 35 may be an appreciable percentage of the array block area. This prior art configuration reduces crosstalk (pattern sensitivity) and allows good signal development, but does so at the cost of significant extra area.